error-resilient viterbi decoders Barnes City Iowa

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error-resilient viterbi decoders Barnes City, Iowa

After the purpose and specifications of software are determined, software developers will design or employ designers to develop a plan for a solution. In: Proc. A ratio in decibels is ten times the logarithm to base 10 of the ratio of two power quantities. The system returned: (22) Invalid argument The remote host or network may be down.

In: Proc. Algorithmic noise-tolerance (ANT) is then applied at the level of the ACSU to correct for these errors. Radiation and Its Effects Components and Systems (RADECS), pp. 519–524 (2008)4.Borkar, S.: Designing reliable systems from unreliable components: the challenges of transistor variability and degradation. Use of this web site signifies your agreement to the terms and conditions.

European Conf. In: Processor and System-on-Chip Simulation, pp. 309–324. IBM manufactures and sells computer hardware and software, and it offers infrastructure, hosting and consulting services in areas ranging from mainframe computers to nanotechnology. In the second one, we allow data-dependent timing errors which occur whenever a critical path in the ACSU is excited.

In: Proc. The system returned: (22) Invalid argument The remote host or network may be down. There are other algorithms for decoding a convolutionally encoded stream (for example, the Fano algorithm). IEEE Design & Test of Computers 27(5), 60–67 (2010)2.Abdallah, R.A., Shanbhag, N.R.: Error-Resilient Low-Power Viterbi Decoder Architectures.

IEEE/ACM/IFIP Workshop Embedded Systems for Real-Time Multimedia, ESTImedia 2008, pp. 13–18 (2008)15.Leem, L., Cho, H., Bau, J., Jacobson, Q.A., Mitra, S.: ERSA: Error Resilient System Architecture for probabilistic applications. Design, Automation & Test in Europe Conf. & Exhibition (DATE), pp. 1560–1565 (2010)16.Lehnigk-Emden, T., Alles, M., Brack, T., Wehn, N.: Simulation Acceleration in Wireless Baseband Processing. We use cookies to improve your experience with our site. It includes low-level component and algorithm implementation issues as well as the architectural view.

Your cache administrator is webmaster. This approach results in very low overhead for error resilience. US & Canada: +1 800 678 4333 Worldwide: +1 732 981 0060 Contact & Support About IEEE Xplore Contact Us Help Terms of Use Nondiscrimination Policy Sitemap Privacy & Opting Out Springer, Heidelberg (2010)CrossRef17.Liu, Y., Zhang, T., Hu, J.: Design of Voltage Overscaled Low-Power Trellis Decoders in Presence of Process Variations.

[email protected] Magazine, 1–8 (February 2005)11.Eltawil, A.M., Kurdahi, F.J.: System Redundancy; A Means of Improving Process Variation Yield Degradation in Memory Arrays. Design, Automation and Test in Europe (DATE 2010), pp. 375–380 (March 2010)20.Mitra, S., Brelsford, K., Kim, Y.M., Lee, H.H.K., Li, Y.: Robust System Design to Overcome CMOS Reliability Challenges. Please try the request again. In: Proc. 47th ACM/IEEE Design Automation Conf. (DAC), pp. 859–864 (2010)24.Shannon, C.E.: A Mathematical Theory of Communication.

morefromWikipedia Voltage Voltage, otherwise known as electrical potential difference or electric tension is the potential difference between two points ¿ or the difference in electric potential energy per unit charge between ACM, New York (2009), http://doi.acm.org/10.1145/1594233.1594282 CrossRef22.Palem, K.V.: Energy aware computing through probabilistic switching: a study of limits. Power savings in the first and second design are 58% and 40% at a coding loss of 0:15 dB and 1:1 dB respectively in a IBM 130nm CMOS process. Get Help About IEEE Xplore Feedback Technical Support Resources and Help Terms of Use What Can I Access?

Hover to learn more.Academia.edu is experimenting with adspdfAn Efficient Viterbi Decoder Architecture5 PagesAn Efficient Viterbi Decoder ArchitectureUploaded byIosr JournalsViewsconnect to downloadGetpdfREAD PAPERAn Efficient Viterbi Decoder ArchitectureDownloadAn Efficient Viterbi Decoder ArchitectureUploaded byIosr Please try the request again. In: Proceedings of the 14th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2009, pp. 195–200. A profound analysis of the impact of timing and soft errors on the system behavior is presented.

INDEX TERMS CITATION Rami A. Use of this web site signifies your agreement to the terms and conditions. The Community for Technology Leaders Toggle navigation Libraries & Institutions About Resources RSS Feeds Newsletter Terms of Use Peer Review Subscribe LOGIN CSDL Home ISLPED 2008 TABLE OF CONTENTS Error-resilient Keywords Error resilience communication systems soft errors timing errors channel decoder Page %P Close Plain text Look Inside Chapter Metrics Provided by Bookmetrix Reference tools Export citation EndNote (.ENW) JabRef (.BIB)

The Viterbi algorithm is the most resource-consuming, but it does the maximum likelihood decoding. The 20 revised full papers presented in 7 technical sessions were carefully reviewed and selected from 65 submissions. In the first, limited decision errors are introduced in the add-compare-select units (ACSUs) of a VD to reduce their critical path delays so that they can be operated at lower supply Internet) Information Storage and Retrieval Keywords Error resilience communication systems soft errors timing errors channel decoder Industry Sectors Pharma Automotive Chemical Manufacturing Biotechnology Electronics IT & Software Telecommunications Consumer Packaged Goods

Shanbhag SHARE Digg Facebook Google+ LinkedIn Reddit Tumblr Twitter Stumbleupon (Ver 3.1 (10032016)) SIGN IN SIGN UP Error-resilient low-power Viterbi decoders Full Text: PDF Get this Article Authors: Rami A. Voltage is equal to the work which would have to be done, per unit charge, against a static electric field to move the charge between two points. In: Proc. In: Proc.

ProceedingsAndreas Herkersdorf, Kay Römer, Uwe BrinkschulteSpringer, 11.02.2012 - 252 Seiten 0 Rezensionenhttps://books.google.de/books/about/Architecture_of_Computing_Systems_ARCS_2.html?hl=de&id=8YUKBwAAQBAJThis book constitutes the refereed proceedings of the 25th International Conference on Architecture of Computing Systems, ARCS 2012, held in morefromWikipedia Tools and Resources Buy this Article Recommend the ACM DLto your organization Request Permissions TOC Service: Email RSS Save to Binder Export Formats: BibTeX EndNote ACMRef Publisher Site Share: | Support Log InSign Upmore Job BoardAboutPressBlogPeoplePapersTermsPrivacyCopyrightWe're Hiring!Help Centerless Log InSign Up We're trying Google Ads to subsidize server costs. If you are logged in, you won't see ads.

To face this challenge, cross-layer approaches become mandatory. In: Proc. IEEE Journal on Emerging and Selected Topics in Circuits and Systems 1(1), 30–41 (2011)CrossRef21.Mohapatra, D., Karakonstantis, G., Roy, K.: Significance driven computation: a voltage-scalable, variation-aware, quality-tuning motion estimator. It is most often used for decoding convolutional codes with constraint lengths k<=10, but values up to k=15 are used in practice.

Please try the request again. A voltage may represent either a source of energy, or it may represent lost or stored energy. Abdallah Articles by Naresh R. Dynamic techniques utilizing higher layers of communication systems to compensate these errors are proposed.